Contains the source code from the course work throughout my undergraduate Computer Engineering degree at Brigham Young University. There is a mixture of Go, Python, C, C++, Java, VHDL, Verilog, Matlab, Bash, Assembly, etc..
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pit.h 4.3KB

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  1. /*****************************************************************************
  2. * Filename: C:\Users\superman\Desktop\korea\SpaceInvaderTestHW2/drivers/pit_v1_00_a/src/pit.h
  3. * Version: 1.00.a
  4. * Description: pit Driver Header File
  5. * Date: Thu Nov 06 14:24:21 2014 (by Create and Import Peripheral Wizard)
  6. *****************************************************************************/
  7. #ifndef PIT_H
  8. #define PIT_H
  9. /***************************** Include Files *******************************/
  10. #include "xbasic_types.h"
  11. #include "xstatus.h"
  12. #include "xil_io.h"
  13. /************************** Constant Definitions ***************************/
  14. /**
  15. * User Logic Slave Space Offsets
  16. * -- SLV_REG0 : user logic slave module register 0
  17. * -- SLV_REG1 : user logic slave module register 1
  18. */
  19. #define PIT_USER_SLV_SPACE_OFFSET (0x00000000)
  20. #define PIT_SLV_REG0_OFFSET (PIT_USER_SLV_SPACE_OFFSET + 0x00000000)
  21. #define PIT_SLV_REG1_OFFSET (PIT_USER_SLV_SPACE_OFFSET + 0x00000004)
  22. /**************************** Type Definitions *****************************/
  23. /***************** Macros (Inline Functions) Definitions *******************/
  24. /**
  25. *
  26. * Write a value to a PIT register. A 32 bit write is performed.
  27. * If the component is implemented in a smaller width, only the least
  28. * significant data is written.
  29. *
  30. * @param BaseAddress is the base address of the PIT device.
  31. * @param RegOffset is the register offset from the base to write to.
  32. * @param Data is the data written to the register.
  33. *
  34. * @return None.
  35. *
  36. * @note
  37. * C-style signature:
  38. * void PIT_mWriteReg(Xuint32 BaseAddress, unsigned RegOffset, Xuint32 Data)
  39. *
  40. */
  41. #define PIT_mWriteReg(BaseAddress, RegOffset, Data) \
  42. Xil_Out32((BaseAddress) + (RegOffset), (Xuint32)(Data))
  43. /**
  44. *
  45. * Read a value from a PIT register. A 32 bit read is performed.
  46. * If the component is implemented in a smaller width, only the least
  47. * significant data is read from the register. The most significant data
  48. * will be read as 0.
  49. *
  50. * @param BaseAddress is the base address of the PIT device.
  51. * @param RegOffset is the register offset from the base to write to.
  52. *
  53. * @return Data is the data from the register.
  54. *
  55. * @note
  56. * C-style signature:
  57. * Xuint32 PIT_mReadReg(Xuint32 BaseAddress, unsigned RegOffset)
  58. *
  59. */
  60. #define PIT_mReadReg(BaseAddress, RegOffset) \
  61. Xil_In32((BaseAddress) + (RegOffset))
  62. /**
  63. *
  64. * Write/Read 32 bit value to/from PIT user logic slave registers.
  65. *
  66. * @param BaseAddress is the base address of the PIT device.
  67. * @param RegOffset is the offset from the slave register to write to or read from.
  68. * @param Value is the data written to the register.
  69. *
  70. * @return Data is the data from the user logic slave register.
  71. *
  72. * @note
  73. * C-style signature:
  74. * void PIT_mWriteSlaveRegn(Xuint32 BaseAddress, unsigned RegOffset, Xuint32 Value)
  75. * Xuint32 PIT_mReadSlaveRegn(Xuint32 BaseAddress, unsigned RegOffset)
  76. *
  77. */
  78. #define PIT_mWriteSlaveReg0(BaseAddress, RegOffset, Value) \
  79. Xil_Out32((BaseAddress) + (PIT_SLV_REG0_OFFSET) + (RegOffset), (Xuint32)(Value))
  80. #define PIT_mWriteSlaveReg1(BaseAddress, RegOffset, Value) \
  81. Xil_Out32((BaseAddress) + (PIT_SLV_REG1_OFFSET) + (RegOffset), (Xuint32)(Value))
  82. #define PIT_mReadSlaveReg0(BaseAddress, RegOffset) \
  83. Xil_In32((BaseAddress) + (PIT_SLV_REG0_OFFSET) + (RegOffset))
  84. #define PIT_mReadSlaveReg1(BaseAddress, RegOffset) \
  85. Xil_In32((BaseAddress) + (PIT_SLV_REG1_OFFSET) + (RegOffset))
  86. /************************** Function Prototypes ****************************/
  87. /**
  88. *
  89. * Run a self-test on the driver/device. Note this may be a destructive test if
  90. * resets of the device are performed.
  91. *
  92. * If the hardware system is not built correctly, this function may never
  93. * return to the caller.
  94. *
  95. * @param baseaddr_p is the base address of the PIT instance to be worked on.
  96. *
  97. * @return
  98. *
  99. * - XST_SUCCESS if all self-test code passed
  100. * - XST_FAILURE if any self-test code failed
  101. *
  102. * @note Caching must be turned off for this function to work.
  103. * @note Self test may fail if data memory and device are not on the same bus.
  104. *
  105. */
  106. XStatus PIT_SelfTest(void * baseaddr_p);
  107. /**
  108. * Defines the number of registers available for read and write*/
  109. #define TEST_AXI_LITE_USER_NUM_REG 2
  110. #endif /** PIT_H */