104 lines
2.5 KiB
VHDL
104 lines
2.5 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity tx_top is
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generic(COUNTER_BIT: natural := 20);
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port(
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clk: in std_logic;
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sw: in std_logic_vector(7 downto 0);
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seg : out std_logic_vector(6 downto 0);
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an : out std_logic_vector(3 downto 0) := "1100";
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dp : out std_logic;
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tx_out: out std_logic;
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btn: in std_logic_vector(3 downto 0);
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data_out : out std_logic_vector(15 downto 0)
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);
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end tx_top;
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architecture top_arch of tx_top is
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-- component seven_segment_display
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-- generic(
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-- COUNTER_BITS: natural := 15
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-- );
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-- port(
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-- clk: in std_logic;
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-- data_in: in std_logic_vector(15 downto 0);
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-- dp_in: in std_logic_Vector(3 downto 0);
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-- blank: in std_logic_vector(3 downto 0);
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-- seg : out std_logic_vector(6 downto 0);
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-- dp : out std_logic;
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-- an : out std_logic_vector(3 downto 0)
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-- );
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-- end component;
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component tx
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port(
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clk: in std_logic;
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rst: in std_logic;
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data_in: in std_logic_vector(7 downto 0);
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send_character: in std_logic;
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tx_out: out std_logic;
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tx_busy: out std_logic
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);
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end component;
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signal reset: std_logic := '0';
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signal dp_in: std_logic_vector(3 downto 0) := "0000";
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signal blank4: std_logic_vector(3 downto 0) := (others=>'0');
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signal data_in: std_logic_vector(7 downto 0) := (others=>'0');
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signal send_character: std_logic;
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signal counter: unsigned(COUNTER_BIT downto 0) := (others=>'0');
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signal debouncing: std_logic;
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signal data_in2: std_logic_vector(15 downto 0) := (others=>'0');
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begin
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-- bottom_segment: seven_segment_display
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-- generic map(COUNTER_BITS=>15)
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-- port map(clk=>clk, an=>an, seg=>seg, dp=>dp, blank=>blank4,
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-- data_in=>data_in2, dp_in=>dp_in
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-- );
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bottom_tx: tx
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port map(clk=>clk, rst=>reset, send_character=>send_character,
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tx_out=>tx_out, tx_busy=>open, data_in=>data_in
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);
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data_out <= "00000000" & sw;
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data_in <= sw;
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data_in2 <= "00000000" & sw;
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-- debouncer
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process(clk)
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begin
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if(rising_edge(clk)) then
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if(counter = "111111111111111111111") then
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debouncing <= '1';
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counter <= (others=>'0');
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else
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debouncing <= '0';
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counter <= counter+1;
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end if;
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end if;
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end process;
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-- button logic
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process(clk,btn)
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begin
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if(rising_edge(clk)) then
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if (btn(3)='1') then
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reset <= '1';
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elsif (btn(0)='1') then
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if(debouncing='1') then
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send_character <= '1';
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end if;
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else
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reset <= '0';
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send_character <= '0';
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end if;
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end if;
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end process;
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end top_arch; |